Design of High-Speed Communication Circuits by Ramesh Harjani

By Ramesh Harjani

MOS expertise has speedily develop into the de facto average for mixed-signal built-in circuit layout as a result of excessive degrees of integration attainable as gadget geometries reduce to nanometer scales. The relief in characteristic measurement implies that the variety of transistor and clock speeds have elevated considerably. in reality, present day microprocessors include hundreds of thousands of hundreds of thousands of transistors working at a number of gigahertz. additionally, this aid in function dimension additionally has an important impression on mixed-signal circuits. as a result better degrees of integration, nearly all of ASICs possesses a few analog parts. It has now develop into approximately crucial to combine either analog and electronic circuits at the similar substrate as a result of expense and gear constraints. This publication offers a number of the more moderen difficulties and possibilities provided through the small machine geometries and the excessive degrees of integration that's now attainable. the purpose of this publication is to summarize probably the most severe facets of high-speed analog/RF communications circuits. recognition is targeted at the effect of scaling, substrate noise, information converters, RF and instant conversation circuits and wireline communique circuits, together with high-speed I/O.

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Conclusions An overview of techniques for estimating and modeling self-induced noise related to substrate coupling and ground-bounce was provided. Full-extraction techniques based on the boundary element method and a fully numerical approach were outlined. The limitations of such approaches were discussed. Gate level macromodeling of substrate noise signatures and the considerable improvement allowed by the use of such techniques was discussed. Finally, a technique based on functional level parametric modeling of mixed-signal cores was presented using an example of a thermometer-to-binary encoder.

XO Fig. 3: Second-order CIFF modulator Analysis of the linearized system with ax = a2 = bx = 1, a3 = 2 leads to the following results: STF = - = z-(2-z-') (5) 4-t (6) '{l-Z-'jx-z-il-Z-'jq (7) NTF-- 2 l v, = z x - z~ q where q is the quantization noise from the ADC, and Vj and v2 are the signals at the outputs of the first and second integrators, respectively. The CIFF improves the performance of CIFB in terms of the signals at the output of the integrators. As can be seen from Eq.

In Engineering Software, 20(1), 19-27 (1994). R. G. Meyer, Modeling and analysis of substrate coupling in integrated circuits, IEEE Journal of Solid State Circuits, 31(3), 344-353 (1996). J. Zhao, W. C. L. Tai, Green function via moment matching for rapid and accurate substrate parasitics evaluation, Proceedings of the IEEE Custom Integrated Circuits Conference, 371-374(1997). 40 Self-Induced Noise in Integrated Circuits 295 19. M. Niknejad, R. G. Meyer, Numerically stable green function for modeling and analysis of substrate coupling in integrated circuits, IEEE Transactions on Computer Aided Design, 17(4), 305-315 (1998).

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