The Bounding Approach to VLSI Circuit Simulation by C.A. Zukowski

By C.A. Zukowski

This booklet proposes a brand new method of circuit simulation that remains in its infancy. the cause of publishing this paintings as a monograph at the present is to quick distribute those principles to the examine neighborhood for additional examine. The publication relies on a doctoral dissertation undertaken at MIT among 1982 and 1985. In 1982 the writer joined a learn staff that was once employing bounding suggestions to easy VLSI timing research versions. The conviction that bounding research may be effectively utilized to classy electronic MOS circuit types resulted in the learn provided right here. Acknowledgments 'me writer wish to recognize many beneficial discussions and masses aid from his learn crew at MIT, together with Lance Glasser, John Wyatt, Jr. , and Paul Penfield, Jr. Many others have additionally contributed to this paintings ultimately, together with Albert Ruchli, Mark Horowitz, wealthy Zippel, Chtis Terman, Jacob White, Mark Matson, Bob Armstrong, Steve McCormick, Cyrus Bamji, John Wroclawski, Omar Wing, Gary Dare, Paul Bassett, and Rick LaMaire. the writer want to supply unique because of his spouse, Deborra, for her aid and lots of contributions to the presentation of this examine. the writer could additionally prefer to thank his mom and dad for his or her encouragement, and IBM for its monetary help of t,I-Jis undertaking via a graduate fellowship. THE BOUNDING method of VLSI CIRCUIT SIMULATION 1. advent The VLSI revolution of the 1970's has created a necessity for brand new circuit research techniques.

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The extremes of behavior in a digital MOS circuit correspond to, for the most part, fast and slow transitions. Along with some intuition about timing in MOS circuits, this observation can be used to determine which ignored correlations in the excitation subset might have a significant impact on the resulting behavior subset. Each of the five types of partitioning for the excitation set is a source of conservative bound specification, and each is analyzed separately here. J Il1e quotes emphasize the fact that, while the time derivative plays ih nonnal role in the circuit.

At least one of these sections provides a relatively low resistance path, except possibly during short transition periods. Coupling between the input and output of aMOS logic gate is primarily in one direction. The internodal capacitance that produces feedback is usually small, making relaxation algorithms converge very quickly. Restoring logic gates have built-in noise immunity that provides a margin for uncertainty in analysis. c. uncertainty, arbitrary uncertainty in voltages during transitions is eventually restored if the inputs are restored.

Which converges to 10/(1- a) with the same rate as in the exact case. Likewise, the upper bound {xn U} converges to 14/(1- a). These bounds, along with the corresponding bounds on y, produce the smallest possible rectangle about the region of possible solutions. Due to the positive feedback, the endpoints are possible solutions and there is no additional conservative bound generation introducedll. For a(O, the feedback is negative and the upper bound xnU is used to calculate the lower bound Yn+ IL, which in turn is used to produce xn + r.

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