The Windows 2000 Device Driver Book: A Guide for Programmers by Art Baker

By Art Baker

The options of this publication are nonetheless important forVista and XP.It additionally explains the basics well.I learn more moderen books first, they usually have been too confusing.Oney's publication provides an excessive amount of details, and jumps fromtopic to topic.Orwick's ebook is just too excessive point, and never adequate aspect.

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Additional info for The Windows 2000 Device Driver Book: A Guide for Programmers (2nd Edition)

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REGISTER ACCESS The PC Card standard defines a 26-bit address range for its I/O access (64 MB). Otherwise, addressing is similar to the ISA scheme. For CardBus, a full 32-bit address range is defined, similar to the PCI bus. INTERRUPT MECHANISMS The PC Card and CardBus standards define a single pin for interrupts, IREQ or CINT. It is level-sensitive and can therefore be shared with other cards on the same bus. However, multifunction PCMCIA cards must arbitrate in software for sharing of the single interrupt wire.

Devices generally take one of two approaches to deal with dedicated memory. Some specify a hard-coded range of physical addresses for their use. A VGA video adapter card, for example, specifies a 128 KB range of addresses beginning at 0xA0000 for its video buffer. Other devices allow an initialization routine to specify the base address of the dedicated memory with software. This latter technique is more flexible, but Windows 2000 allows for either method to work with the operating system. Auto-recognition and Auto-configuration Every hardware device consumes PC resources.

This deferral of execution is critical when servicing hardware interrupts in a driver because there is no reason to block lower-level IRQL code from executing if a given task can be deferred. 1 illustrates the operation of a DPC. Subsequent chapters present more specific information about the use of a DPC in a driver, but an overview is presented below. 1. Deferred Procedure Call flow. 1. , hardware) IRQL wants to schedule some of its work at a lower IRQL, it adds a DPC object to the end of the system's DPC dispatching queue and requests a DPC software interrupt.

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